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keysight M9703A axie high-speed digitizer/ wideband digital receiver 8 channels, 12-bit, up to 3.2 gs/s, dc up to 2 ghz input frequency range data sheet
overview introduction the M9703A is a very fast versatile dc-coupled 12-bit wideband digital receiver/digitizer, providing exceptional measurement idelity over multiple phase coherent channels. based on the axie standard, offering eight acquisition channels in a single-slot card, it provides excellent channel density and lexible scalabilit y. these features allow the implementation of a large number of high dy- namic range, phase-coherent channels in a small volume, making the M9703A high-speed digitizer/wideband digital receiver ideal for multi-channel applications in advanced physics, aerospace & defense, and rf communications. product description the M9703A is a revolutionary 8-channel, 12-bit wideband digital receiver/digitizer, implementing a patented front-end able to capture signals from dc up to 2 ghz at 1.6 gs/s, with exception- al measurement accuracy. an interleaving capability allows two channels to be combined to acquire at 3.2 gs/s on four channels with more than 1 ghz instantaneous bandwidth. the M9703A wideband digital receiver/digitizer also provides very long on-board acquisition memory and real-time data processing capability with four virtex 6 fpgas. the on-board fpgas can feature an optional real-time digital downconverter (ddc) that allows tuning and zooming on the sig- nal to be analyzed. the ddc functionality improves the dynamic range, reduces the noise loor, extends the capture time, and accelerates the measurement speed. for information on other irmware options please contact keysight technologies, inc.: digitizers@keysight.com the M9703A high-speed digitizer can also be combined with the keysight 89600 vsa software for advanced multi-channel signal analysis. example applications C medical research instrumentation C environmental monitoring (laser and lidar) C analytical time-of-light (tof) C ultrasonic non-destructive testing (ndt) C semiconductor product features C 8 channels (4 when interleaving) with 12-bit resolution C up to 3.2 gs/s sampling rate (with -sr2 and -int options) C dc to 2 ghz input frequency range (with -f10 option in non interleaved acquisition) C accurate time-to-trigger interpolator (tti) C up to 16 gb (1 gsamples/ch) on-board memory C pcie backplane providing 1.1 gb/s data transfer speed C 4 conigurable virtex-6 fpgas C real-time digital downconversion (ddc) C 8 phase-coherent channels with independent local oscillators (lo) setting, tunable with 0.01 hz resolution C adjustable analysis bandwidth from 300 mhz down to less than 1 khz C magnitude trigger uncompromising values C very wide bandwidth and fast acquisition with optimized dynamic range C get toward a fully digital receiver C scalable phase-coherent acquisition channels in a small space C high measurement throughput C open fpga for custom processing C reduced test time by tuning and zooming on signals (requires -ddc option) C isolate the signal of interest C improve the dynamic range C extend the capture time, or reduce the amount of trans- ferred data C trigger on the signal of interest 02 | keysight | axie high-speed digitizer/wideband digital receiver - data sheet
real-time processing memory and acquisition control fpga in 2 in 1 ddr3 memory ddr3 memory dc front- end dpu a dc front- end real-time processing memory and acquisition control fpga in 4 in 3 ddr3 memory ddr3 memory dc front- end dpu b dc front- end real-time processing memory and acquisition control fpga in 6 in 5 ddr3 memory ddr3 memory dc front- end dpu c dc front- end real-time processing memory and acquisition control fpga in 8 in 7 ddr3 memory ddr3 memory dc front- end dpu d dc front- end trg 1 trg 2 trg 3 trg out ref in clk in time base ctrl fpga pcie switch axie backplane adc adc adc adc adc adc adc adc hardware platform product overview the M9703A is a lexible modular wideband digital receiver/ digi - tizer offering scalable features depending on application require- ments. the standard coniguration implements 8 channels of 12-bit resolution with dc to 650 mhz input frequency range (C3 db analog bandwidth), and acquiring data at 1 gs/s. if higher speed is required, the -sr2 option enables the eight channels to sample at 1.6 gs/s. an interleave option (-int) also allows two channels to be combined and reach 3.2 gs/s in 4-channel acqui- sition mode. for higher frequency signals, the -f10 option pro- vides an extended input frequency range of dc up to 2 ghz in non interleaved mode, or dc to > 1 ghz when interleaving channels 1 . for applications where the dynamic range and signal sensitivity is critical, the -frf option provides optimized analog performance for the best measurement integrity. data processing the M9703A implements four xilinx virtex-6 fpgas dedicated to data processing. the four data processing units (dpu) implement a standard digitizer functionality irmware by default, allowing digitization of the signal, storage of the resulting data in the on- board memory and transfer through the pcie backplane bus. the four dpus may optionally feature a real-time digital down- conversion (ddc) ip algorithm if ordered with the -ddc or the -ldc options. the ddc allows tuning and zooming on the signals to be analyzed, improving the dynamic range, reducing the noise loor, extending the capture time, and accelerating the measure - ment speed. the -ldc option is especially suited for mimo and multi-channel bbiq applications. it provides up to 80 mhz of real-time frequen - cy span (analysis bandwidth) per channel when combined with the -sr2 option (up to 50 mhz with -sr1). for demanding applications, the -ddc option extends the re- al-time frequency span/analysis bandwidth to up to 300 mhz. both -ldc and -ddc allow to vary the center frequency from dc to 1.6 ghz 2 independently per channel. the M9703A also provides open access to its on-board process- ing fpgas for custom algorithm implementation. this can be reached through the systemvue software w1462bp fpga archi - tect, providing an automatic push button programming approach. figure 1. simpliied block diagram of the M9703A axie digitizer. figure 2. M9703A clocking mode simpliied block diagram. 1. the fact that there is less frequency range when interleaving channels is d ue to internal characteristics of the analog-to-digital converter c hipset that ilters at 1 ghz when combining channels. 2. if -f10 option is ordered, otherwise limits to 650 mhz. 100 mhz internal ref. internal clock clock distribution adc adc adc adc ref in axie 100 mhz backplane reference clock clk in block diagram 03 | keysight | axie high-speed digitizer/wideband digital receiver - data sheet
software platform i/o libraries keysight io libraries suite offers fast and easy connection to instruments using a standardize interface and ensure compatibility as well as upgradability of the software applications. the keysight io libraries suite helps you by displaying all of the modules in your system. from here you can view information about the installed software or launch the modules soft front panel directly from keysight connection expert (kce). in addition, kce offers an easy way to ind the correct driver for your instrument. drivers the M9703A axie digitizer is supplied with a comprehensive port- folio of module drivers, documentation, examples, and software tools to help you quickly develop test systems with your software platform of choice. the module comes with ivi-c, ivi-com, and labview software drivers to work in the most popular develop- ment environments, such as matlab, labview, microsoft c/c++ or c#. these drivers are provided for windows and linux operat- ing systems. easy software integration to help you get started and complete complex tasks quickly, the module software is provided with context sensitive help, complete documentation and code examples that allow a quick module set up and basic acquisition functionalities. these code examples can be easily modiied, so that the card can be quickly integrated into a measurement system. included are application code examples for labview, labwindows/cvi, visual studio c, c++, and c#, and matlab which provide digitizer set up and basic acquisition functionality. compliance the M9703A is compliant with axie ? and advancedtca (atca) formats. designed to beneit from fast data interfaces, the prod - uct can be integrated into axie or atca chassis slots. based on atca, the axie standard implements extensions for instrumenta- tion and test, and uses clever techniques to add powerful timing features. software applications in addition, the M9703A includes the keysight md1 soft front panel (sfp) graphical interface. this simple software application can be used to control, verify the functionality and explore the capabilities of the keysight modular high-speed digitizers. for advanced measurement analysis, the M9703A axie wideband digital receiver/digitizer can be combined with keysights 89600 vector signal analysis software, the industrys standard for signal analysis and demodulation. thanks to the exceptional data throughput (1.1 gb/s) of its pcie backplane bus, the M9703A allows a much faster connection to the 89600 vsa software, compared to traditional instruments. the M9703A digitizer is also supported by keysight systemvue electronic design automation (eda) environment software. the systemvue eda software includes rich processing libraries, enabling system architects and algorithm developers in wire- less and aerospace/defense communications to innovate. when coupling the M9703A wideband digital receiver with systemvue w1462 fpga architect, designers have at their disposal an open fpga development environment for custom on-board processing. this solution allows a complete, integrated design-to-test low, dramatically cutting design to prototyping time and veriication effort. figure 3. keysight M9703A md1 software front panel (sfp) interface. 2014 finalist 04 | keysight | axie high-speed digitizer/wideband digital receiver - data sheet
firmware options the M9703A high-speed digitizer provides various irmware options: C dgt : digitizer irmware C ddc : wideband real-time digital downconversion C ldc : limited-bandwidth real-time digital downconversion C fdk : on-board fpga programming access the -dgt option features a standard digitizer irmware that is included in the default coniguration. the digitizer irmware allows standard data acquisition, including: digitizer initialization , setting of the acquisition and clocking modes, management of channel synchronization, storing the data in the internal memory and/or transferring them through the backplane bus. the digitizer irm - ware also implements segmented acquisition functionality. the real-time digital downconversion (ddc) options -ldc and -ddc, in addition to the basic digitizer functionality, implement a real-time digital decimation and iltering on the digitized data, allowing the user to tune and zoom on the signals of interest. this exclusive ip algorithm provides very powerful and lexible digital downconversion on all 8 channels. the ilters and local oscillators (lo) are synchronized to maintain constant phase and timing relationships allowing phase-coherent post processing. the ddc provides three main functions: C data reduction (zoom) reducing the bandwidth and sample rate to match the analyzed signal decreases the amount of data that needs to be transferred for a given capture duration, in turn acceler- ating post-processing operations. C frequency shifting (tune) independently shifting each channels if signal into base- band, allows the analysis bandwidth to be set around the signal of interest. C magnitude trigger setting the magnitude level that a signal needs to achieve at a speciied frequency and bandwidth allows triggering only on the signal of interest. front-end options the M9703A wideband digital receiver/digitizer provides a range of front-end options to adapt the digitization to the particular application requirements. these options are divided in three categories: C bandwidth the instantaneous analog bandwidth is the C3 db compres - sion point of the analog front-end frequency response. the M9703A provides two levels of instantaneous analog band- width. the default -f05 option provides an input frequency range of dc to 650 mhz, especially suited for baseband applications (e.g. bbiq). if more bandwidth is required, or for higher if frequency signals, the -f10 option provides an extended input frequency range up to 2 ghz (in non-inter- leaved mode) 1 . C sampling rate the standard coniguration of the product includes the -sr1 option, allowing digitization at 1 gs/s. the -sr2 option increases this rate to 1.6 gs/s, and if even higher sampling rates are required, the -int option allows interleaving of the input channels providing 3.2 gs/s on four acquisition channels. C front-end analog performance the M9703A wideband digital receiver/digitizer provides exceptional analog-to-digital conversion performance in its standard coniguration, with very high dynamic range and low noise. in some applications, every db of dynamic range is critical, and for those applications, the -frf option pushes the analog performance optimization further in order to reach even better dynamic range, and signal sensitivity. 1. dc to 1.4 ghz when interleaving channels. figure 4. noise power spectral density (nsd) measured with the 89600 vsa so ft- ware on one channel of the M9703A. with a very low nsd down to C146 dbm/hz, the M9703A has comparable performance to some 16-bit digit izers. magnitude trigger adc fpga control memory dec/2 n dec/2 n lpf lpf lo figure 5. single channel digital downconverter (ddc) simpliied bloc k diagram. 05 | keysight | axie high-speed digitizer/wideband digital receiver - data sheet
firmware options (continued) these three functions allow isolation of the signal of interest from other signals in a crowded spectrum, improved dynamic range as the integrated noise is reduced, and increased snr and effective number of bits (enob). the resulting advantage for your applica - tion is a reduced test time, while improving overall test eficiency. figure 6. the excellent channel-channel phase coherency, coupled wi th the wide- band and lexible capability of the -ddc option, allows exceptionally fa st and accu - rate cross-channel measurements on a large variety of signals, such as mu lti-tone, wideband frequency chirps, or complex signals. in this case, we show the me asure- ment of cross-channel phase and amplitude for a 160 mhz frequency chirp. figure 7. the M9703A-ldc option provides real-time digital downconv ersion for up to 80 mhz frequency span per channel (160 mhz in i+jq mode), ideal for emerging communications standards research and design validation.here we s how the anal- ysis of four 802.11ac 160 mhz wide baseband signals. the M9703A allows to rea ch an evm of down to C45 db. the wideband capability of the M9703A, combined with its excellent signal sensitivity and dynamic range is a step toward a fully digital receiver, by reducing or suppressing the analog mixer stages. as an example, the M9703A wideband digital receiver/ digitizer can directly digitize dvb-t signals, especially inter - esting for passive radar applications. when combined with the m9362a-d01 quad-channel downconverter, the M9703A allows capture and analysis of wideband signals up to 50 ghz. figure 8. the M9703A wideband digital receiver allows to directly digit ize dvb-t signals with excellent dynamic range without the need of analog mixers, e specially interesting for passive radar applications. the -fdk option allows the access to the four on-board process- ing fpgas for custom algorithm implementation. the fpga pro- gramming is reached via the w1462 systemvue fpga architect, and excludes the usage of other M9703A irmware options (such as the ddc). figure 9. systemvue software model-based design low. 06 | keysight | axie high-speed digitizer/wideband digital receiver - data sheet
technical speciications and characteristics 1. the channel-to-channel skew is deined as the magnitude of time delay diff erence between two digitized channel inputs, granted the same signal is provided to each channel at the exact same time. 2. the measurement represents the maximum time skew, measured with a sinei t method on 100k samples, for a sinusoid signal at 400 mhz and averaged 10 times. 3. skew and offset stability are measured at 25 c in a climatic chamber. the sk ew and offset between channels are measured every 5 minutes over 12 hours and after 1hour stabilization time and the values represent the di spersion of the measurements. valid for channels within a same module and accross modules of a same chassis. 4. measured at 1.6 gs/s for a -1 dbfs input signal in internal clock mode with f10 opt ion. analog input (in1 to in8 sma connectors) number of channels 8 (eight), 8 or 4 (with int option) impedance 50 ? 2 % coupling dc full scale ranges (fsr) 1 v and 2 v (3.98 dbm and 10 dbm) maximum input voltage 1v fsr: 3 v rms, 3.6 vpk 2v fsr: 4.3 v rms, 6.3 vpk input frequency range (C3 db bandwidth) dc to 1.9 ghz (typical) in 1v fsr at 1 gs/s or 1.6 gs/s dc to 2.0 ghz (typical) in 2v fsr at 1 gs/s or 1.6 gs/s dc to 1.4 ghz (typical) at 2 gs/s or 3.2 gs/s dc gain accuracy 0.5% (typical) offset accuracy 0.5% in 1v fsr 1.5% in 2v fsr time skew 1 channel-to-channel skew 2 50 ps (nominal) in same module 150 ps (nominal) between multiple modules of same chassis channel-to-channel skew stability 3 200 fs pk (nominal) 75 fs rms (nominal) phase offset channel-to-channel offset (@ 400 mhz ) 7.2 (nominal) in same module 21.6 (nominal) between multiple modules of same chassis channel-to-channel offset stability 3 0.03 pk (nominal) 0.01 rms (nominal) input voltage offset C2xfsr to +2xfsr bandwidth limit ilters (bwl) 650 mhz (nominal) frequency response latness 1 db from dc to 650 mhz standard front-end coniguration effective bits (enob) 4 @ 48 mhz 9.0 (typical) @ 100 mhz 9.1 (typical) @ 410 mhz 8.2 (8.9, typical) signal to noise distortion (snr) 4 @ 48 mhz 58 db (typical) @ 100 mhz 58 db (typical) @ 410 mhz 54 db (56 db, typical) spurious free dynamic range (sfdr) 4 @ 48 mhz 59 dbc (typical) @ 100 mhz 63 dbc (typical) @ 410 mhz 52 dbc (60 dbc, typical) total harmonic distortion (thd) 4 @ 48 mhz C59 db (typical) @ 100 mhz C62 db (typical) @ 410 mhz C60 db (typical) noise spectral density (nsd) C146 dbm/hz (nominal) 07 | keysight | axie high-speed digitizer/wideband digital receiver - data sheet
analog input (in1 to in8 sma connectors), continued with -frf option (optimized dynamic range) effective bits (enob) 1 @ 48 mhz 8.7 (9.1, typical ) @ 100 mhz 8.8 (9.2, typical ) @ 410 mhz 8.8 (9.1, typical ) @ 650 mhz 8.7 (9.0, typical ) @ 925 mhz 8.3 (8.8, typical ) signal to noise distortion (snr) 1 @ 48 mhz 56 db (58 db, typical ) @ 100 mhz 56 db (58 db, typical ) @ 410 mhz 55 db (58 db, typical ) @ 650 mhz 54 db (57 db, typical ) @ 925 mhz 52 db (55 db, typical ) spurious free dynamic range (sfdr) 1 @ 48 mhz 55 dbc (60 dbc, typical ) @ 100 mhz 60 dbc (65 dbc, typical ) @ 410 mhz 58 dbc (63 dbc, typical ) @ 650 mhz 58 dbc (64 dbc, typical ) @ 925 mhz 56 dbc (61 dbc, typical ) total harmonic distortion (thd) 1 @ 48 mhz C60 db (typical) @ 100 mhz C62 db (typical) @ 410 mhz C62 db ( (typical) @ 650 mhz C64 db ( (typical) @ 925 mhz C61 db (typical) baseband iq (bbiq) characteristics nominal evm using keysight 89600b vsa software siso 802.11ac 256qam 80 mhz bw C45 db (nominal) without correction ilter C47 db (nominal) with correction ilter 160 mhz bw C43 db (nominal) without correction ilter C45 db (nominal) with correction ilter mimo 802.11ac 256qam, 2x2 80 mhz bw C45 db (nominal) without correction ilter 160 mhz bw C43 db (nominal) without correction ilter mimo 802.11ac 256qam, 4x4 80 mhz bw C44 db (nominal) without correction ilter 160 mhz bw C42 db (nominal) without correction ilter siso lte-a fdd dl, 2ccs full illed 64qam 2x20 mhz bw C50 db (nominal) without correction ilter siso lte-a fdd dl, 4ccs full illed 64qam 4x20 mhz bw C47 db (nominal) without correction ilter siso lte-a fdd dl, 5ccs full illed 64qam 5x20 mhz bw C45 db (nominal) without correction ilter siso 64 point fft ofdm 800 mhz bw C42 db (nominal) with correction ilter 1. measured at 1.6 gs/s for a C1 dbfs input signal in internal clock mode with f10 opt ion. technical speciications and characteristics (continued) 08 | keysight | axie high-speed digitizer/wideband digital receiver - data sheet
1. measured for a cw signal of C10 dbm at the center frequency of the analyzed frequ ency span (bw). 2. jitter igure based on phase noise integration from 100 hz to 1600 mhz. 3. the sampling rate corresponds to half of the external clock frequency i n 8-channel mode (non interleaved channels). in interleaved mode (onl y available with the int option), the sampling rate corresponds to the freq uency of the external clock signal. analog input (in1 to in8 sma connectors), continued rf characteristics nominal evm using keysight 89600b vsa software gsm bts signal @ 900 mhz @ 1.8 ghz C51 db (nominal) C48 db (nominal) dvb-t signal 10 mhz bw @ 850 mhz C53 db (nominal) spurious-free dynamic range (sfdr) nominal performance measured with key sight 89600b vsa software 1 sfdr 30 mhz bw @ 900 mhz C92 dbc (nominal) 80 mhz bw @ 900 mhz C90 dbc (nominal) 100 mhz bw @ 400 mhz C92 dbc (nominal) 400 mhz bw @ 400 mhz C87 dbc (nominal) 625 mhz bw @ 400 mhz C83 dbc (nominal) digital conversion resolution 12 bits acquisition memory (total) standard -m40 -m16 1 gb (64m real samples/ch) 4 gb option (256m real samples/ch) 16 gb option (1g real samples/ch) sample clock sources internal or external internal clock source internal, external or backplane reference max. real-time sampling rates standard -sr2 -int -int, -sr2 1 gs/s per channel 1.6 gs/s per channel option 1-2 gs/s option 1.6-3.2 gs/s option sampling jitter 225 fs (nominal) 2 clock accuracy 1.5 ppm external clock source (clk in sma connector) impedance 50 ? (nominal) frequency range 3 standard -sr2 1.8 ghz to 2 ghz 1.8 ghz to 3.2 ghz signal level +5 dbm to +15 dbm (nominal) coupling ac external reference clock (ref in mcx connector) impedance 50 ? (nominal) frequency range 100 mhz 5 khz (nominal) signal level C3 dbm to +3 dbm (nominal) coupling ac acquisition modes single shot, sequence (up to 65536 segments. segment maximum length = memory size/number of channels) technical speciications and characteristics (continued) 09 | keysight | axie high-speed digitizer/wideband digital receiver - data sheet
real-time digital downconversion (-ldc and -ddc options) acquisition modes basic digitizer or ddc digitizer 3. 4 number of synchronous ddc channels 8 in a single module up to 40 across 5 modules in a same m9505a chassis frequency tuning range (lo) dc to 1.6 ghz (with -f10) center frequency tuning resolution 0.01 hz independent channel center frequency tuning yes independent channel frequency span no decimated sampling rate analysis bandwidth maximum acquisition memory time 6 -sr1 -sr2 -sr1 -sr2 -sr1 -sr2 n -ldc -ddc -ldc -ddc -ldc -ddc -ldc -ddc -ldc -ddc -ldc -ddc 0 - 250 ms/s 5 - 400 ms/s 5 - 180 mhz 3 - 300 mhz 5 - 2.048 s - 1.28 s 1 - 125 ms/s - 200 ms/s - 100 mhz - 160 mhz - 2.048 s - 1.28 s 2 62.5 ms/s 100 ms/s 50 mhz 80 mhz 4.096 s 2.56 s 3 31.25 ms/s 50 ms/s 25 mhz 40 mhz 8.192 s 5.12 s 4 15.625 ms/s 25 ms/s 12.5 mhz 20 mhz 16.384 s 10.24 s 5 7.812 ms/s 12.5 ms/s 6.25 mhz 10 mhz 32.768 s 20.48 s ... (62.5/2 n-2 ) ms/s (100/2 n-2 ) ms/s (200/2 n-2 ) mhz (320/2 n-2 ) mhz (2.048*2 n-2 ) s (1.28*2 n-2 ) s 18 0.238 ks/s 0.381 ks/s 0.763 khz 1.22 khz 536,871 s 335,544 s trigger trigger modes edge (positive, negative), level, magnitude 1 trigger sources external, software, channel channel trigger frequency range dc to 250 mhz external trigger (trg 1, trg 2, trg 3 mcx connectors) coupling dc impedance 50 ? (nominal) level range 5 v (nominal) amplitude 0.5 v pk-pk frequency range dc to 2 ghz maximum time stamp duration -sr1 -sr2 52 days 32 days trigger time interpolator resolution -sr1 -sr2 7.75 ps (nominal) 6.25 ps (nominal) trigger time interpolator precision -sr1 -sr2 20.7 ps rms (nominal) 15 ps rms (nominal) rearm time digitizer mode ddc mode 0.8 us (nominal) 2.5 us trigger out (trg out mcx connector) 2 signal level 1.15 vpkCpk (nominal) rise/fall time 9 ns / 19 ns (nominal) 1. only with -ddc option. 2. at 10 mhz on a 50 ? load. 3. the real-time ddc is active only for 1 gs/s and 1.6 gs/s sampling rate modes (n on-interleaved mode). 4. in ddc mode, each sample is a pair or i & q samples. each sample is coded on 64 bits (32-bi t i and 32-bit q) when the decimation factor is >4, otherwise the coding is made on 32 bits (16-bit i and 16-bit q). 5. limited aliasing protection at 250 ms/s and 400 ms/s for signals wider th an 250 mhz and 400 mhz respectively. 6. these acquisition times can be achieved with the -m40 option. technical speciications and characteristics (continued) 10 | keysight | axie high-speed digitizer/wideband digital receiver - data sheet
1. samples of this product have been type tested in accordance with the keysig ht environmental test manual and veriied to be robust against the environmental stresses of storage, transportation and end-use; th ose stresses include but are not limited to temperature, humidity, shoc k, vibration, altitude and power line conditions. test methods are aligned with iec 600 68-2 and levels are similar to mil-prf-28800f class 3. 2. net framework runtime components are installed by default with wind ows vista. therefore, you may not need this amount of available disk space. 3. because of the installation procedure, less disk space may be required fo r operation than is required for installation. the amount of spaceliste d above is required for installation. technical speciications and characteristics (continued) environmental and physical 1 temperature range operating non-operating 0 c to +45 c C40 c to +70 c emc complies with european emc directive 2004/108/ec C iec/en 61326-1 C cispr pub 11 group 1, class a C as/nzs cispr 11 C ices/nmb-001 this ism device complies with canadian ices-001. cet appareil ism est conforme la norme nmb-001 du canada. power dissipation C48 v total power 3.4 a (typical) 161 w (typical), with -dgt option 3.6 a (nominal) 170 w (nominal) , with -ddc option mechanical characteristics form factor 1 slot axie size 30 mm w x 322.2 mm h x 280 mm d weight 3 kg (6.61 lbs) system requirements topic windows 7 requirements linux operating systems windows 7 (32-bit and 64-bit), all versions linux kernel 2.6 or higher (32 or 64-bit ), debian 7.0, centos 6 processor speed 1 ghz 32-bit (x86), 1 ghz 64-bit (x64), no support for itanium 64 as per the minimum requirements of the chosen distribution available memory 1 gb minimum as per the minimum requirements of the chosen distribution available disk space 1 1.5 gb available hard disk space, includes: C 1 gb available for microsoft .net framework 3.5 sp1 2 C 100 mb for keysight io libraries suite 100 mb video support for directx 9 graphics with 128 mb graphics memory recommended (super vga graphics is supported) no graphics required (for headless system), or x windows browser microsoft internet explorer 7 or greater distribution supplied browser 11 | keysight | axie high-speed digitizer/wideband digital receiver - data sheet
figure 11. M9703A nominal dynamic performance in 1 v fsr for a C1 dbfs input signal at 48 mhz. figure 12. the fft plot for a C1 dbfs input signal at 100 mhz in 1 v fsr shows the excellent dynamic range of the M9703A high-speed digitizer. figure 10. measured sampling clock phase noise with an internal referen ce clock. figure 13. M9703A nominal dynamic performance in 1 v fsr for a C1 dbfs input signal at 410 mhz. note how the dynamic range is still excellent for high frequency signals. figure 14. the M9703A nominal dynamic performance in 1 v fsr with no input signal (open input) shows a very low noise loor. dbfs (dbfs) dbfs (dbfs) dbfs (dbfs) dbfs (dbfs) technical speciications and characteristics (continued) 12 | keysight | axie high-speed digitizer/wideband digital receiver - data sheet
figure 16. the M9703A has excellent dynamic range over a very wide bandwidt h. in this example, the spectrum of a 400 mhz single tone signal, using the 89600 vsa software ddc, with 625 mhz frequency span centered at 400 mhz, showing -83 dbc sfdr. figure 19. am/am and am/pm characteristic for a 16qam 20 msym/s lte signal with 400 mhz if frequency and 100 mhz analyzed bandwidth. figure 15. the exceptional noise power spectral density of the M9703A cou pled with the real-time ddc allows the detection of very small signals. in th is example, an 80 mhz span centered at 900 mhz, showing a very low noise loor of less than C100 dbm. figure 18. am/am and am/pm characteristic for a 16qam 500 msym/s lte signal at 400 mhz if frequency and 625 mhz analyzed bandwidth. figure 17. am/am and am/pm characteristic for a 16qam 250 msym/s lte signal at 400 mhz if frequency and 400 mhz analyzed bandwidth. technical speciications and characteristics (continued) 13 | keysight | axie high-speed digitizer/wideband digital receiver - data sheet
front panel connectors deinitions for speciications speciications describe the warranted performance of calibrated instruments that ha ve been stored for a minimum of 2 hours within the operating temperature range of 0 to 45 c, unless otherwise stated, an d after a 45 minute warm-up period. data represented in this document are speciications unless otherwise noted . characteristics describe product performance that is useful in the application of the produc t, but that is not covered by the product warranty. characteristics are often referred to as typical or no minal values. C typical describes characteristic performance, which 80% of instruments wil l meet when operated over a 20 to 30 c tem- perature range. typical performance is not warranted. C nominal describes representative performance that is useful in the applicati on of the product when operated over a 20 to 30 c temperature range. nominal performance is not warranted. note: all graphs contain measured data from several units at room tempera ture unless otherwise noted. calibration intervals the M9703A is factory calibrated and shipped with a calibration certiic ate. calibration is recommended every year in order to verify product performa nce. technical speciications and characteristics (continued) data processing unit a data processing unit b data processing unit c data processing unit d input 1 input 2 input 3 input 4 input 5 input 6 input 7 input 8 reference input external clock input trigger in 1 trigger in 2 trigger in 3 input/output 1 input/output 2 card status indicator light trigger out 14 | keysight | axie high-speed digitizer/wideband digital receiver - data sheet
related products model description m9502a 2-slot axie chassis m9505a 5-slot axie chassis m9514a 14-slot axie chassis m9536a embedded axie controller u1092a acqirismaqs multichannel acquisition software 89601b 89600 vsa software, transportable license w1462bp systemvue fpga architect u5340a fpga development kit for high-speed digitizers ordering information model description M9703A axie 12-bit digitizer with on-board processing includes: C software, example programs and product information on cd C return to keysight warranty extended to 3 years conigurable options sampling rate M9703A-sr1 1 gs/s sampling rate version (2 gs/s sampling rate with -int option) M9703A-sr2 1.6 gs/s sampling rate version (3.2 gs/s sampling rate with -int option) bandwidth M9703A-f05 input frequency: dc to 650 mhz M9703A-f10 input frequency: dc to 2 ghz (not interleaved) input frequency: dc to 1 ghz (interleaved) front-end M9703A-frf optimized dynamic range memory M9703A-m10 1 gb (64 ms/ch) acquisition memory M9703A-m40 4 gb (256 ms/ch) acquisition memory M9703A-m16 16 gb (1 gs/ch) acquisition memory coniguration and ordering information software information chassis slot compatibility: axie, atca supported operating systems see system requirements keysight io libraries includes: visa libraries, keysight connection expert, io monitor figure 20. five keysight M9703A axie 12-bit digitizers installed in the keysight m9505a 5-slot axie chassis to form a 40-channel 12-bit acquisition system. figure 21. one keysight M9703A axie 12-bit digitizers and one m9536a embedded axie controller installed in the keysight m9502a 2-slot axie chassis. typical system coniguration model description M9703A axie digitizer, 12-bit, 8-channel m9505a 5-slot axie chassis m9047a pcie deskstop pc adapter: gen2, x8 advantage services: calibration and warranty keysight advantage services is committed to your success throughout your equipments lifetime. M9703A-uk6 commercial calibration certiicate calibration with test data included 3-year warranty (return to keysight), standard r-51b-001-5z 5-year return to keysight warranty assurance plan firmware M9703A-dgt digitizer irmware M9703A-ddc wideband real-time digital down-conversion M9703A-ldc limited-bandwidth real-time digital down-conversion 50 mhz real-time analysis bandwidth with -sr1 80 mhz real-time analysis bandwidth with -sr2 M9703A-int interleaved channel sampling functionality M9703A-fdk fpga programming access these options represent the standard coniguration of the M9703A. 15 | keysight | axie high-speed digitizer/wideband digital receiver - data sheet
for more information on keysight technologies products, applications or services, please contact your local keysight office. the complete list is available at: www.keysight.com/find/contactus americas canada (877) 894 4414 brazil 55 11 3351 7010 mexico 001 800 254 2440 united states (800) 829 4444 asia paciic australia 1 800 629 485 china 800 810 0189 hong kong 800 938 693 india 1 800 112 929 japan 0120 (421) 345 korea 080 769 0800 malaysia 1 800 888 848 singapore 1 800 375 8100 taiwan 0800 047 866 other ap countries (65) 6375 8100 europe & middle east austria 0800 001122 belgium 0800 58580 finland 0800 523252 france 0805 980333 germany 0800 6270999 ireland 1800 832700 israel 1 809 343051 italy 800 599100 luxembourg +32 800 58580 netherlands 0800 0233200 russia 8800 5009286 spain 800 000154 sweden 0200 882255 switzerland 0800 805353 opt. 1 (de)opt. 2 (fr) opt. 3 (it) united kingdom 0800 0260637 for other unlisted countries: www.keysight.com/find/contactus (bp-09-23-14) 16 | keysight | axie high-speed digitizer/wideband digital receiver - data sheet mykeysight www.keysight.com/find/mykeysighta personalized view into the information most relevant to you. www.axiestandard.org advancedtca ? extensions for instrumentation and test (axie) is an open standard that extends the advancedtca for general purpose and semiconductor test. keysight is a founding member of the axie consortium. atca ? , advancedtca ? , and the atca logo are registered us trademarks of the pci industrial computer manufacturers group. www.pxisa.org pci extensions for instrumentation (pxi) modular instrumentation delivers a rugged, pc-based high-performance measurement and automation system. www.pcisig.com pci-sig ? , pcie ? and the pci express ? are us registered trademarks and/or service marks of pci-sig. three-year warranty www.keysight.com/find/threeyearwarrantykeysights commitment to superior product quality and lower total cost of ownership. the only test and measurement company with three-year warranty standard on all instruments, worldwide. keysight assurance plans www.keysight.com/find/assuranceplansup to five years of protection and no budgetary surprises to ensure your instruments are operating to specification so you can rely on accurate measurements. www.keysight.com/go/quality keysight technologies, inc. dekra certified iso 9001:2008 quality management system www.keysight.com/find/high-speed-digitizers www.keysight.com/find/M9703A this information is subject to change without notice.? keysight technologies, 2013-2014 published in usa, december 10, 2014 5990-8507en www.keysight.com

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